The storage of information using charge coupled devices has facilitated fabrication of high density memory devices. Typically, charge coupled device memories have taken the form of the series-parallel-series configuration well known in the art. (See for example Sequin et al, Charged Transfer Devices, Academic Press, 1975, page 244). A charge coupled device (CCD) serial input register loads charge packets in parallel fashion into a plurality of parallel CCD registers. Charge is extracted from the parallel CCD registers into a CCD serial output register in parallel fashion. Each parallel CCD register receives the input charge packets from a particular cell of the serial CCD input register. As a result, the spacing, and therefore the density, of the parallel storage array is a function of the spacing of the serial CCD register cells. U.S. Pat. No. 3,913,077 to Erb discloses an interlaced series-parallel arrangement in which the density of the parallel storage array is doubled. Nevertheless, in the interlaced arrangement of the Erb patent the density of the parallel storage array is still a function of the spacing of the cells in the serial CCD registers, since each of the parallel registers in the interlaced device of Erb receives charge from a particular cell of the serial CCD input register.
A parallel storage array in which the input serial CCD register is eliminated is disclosed in Kohyama et al, "A New Multiplexed Electrode Per-Bit Structure for a 64 K-Bit Charged Coupled Device Memory," IEEE Journal of Solid State Circuits, Vol. SC-12, No. 4 August 1977, pages 335 through 343. The device disclosed in the Kohyama publication is not useful with a CCD serial input register, since this device requires a voltage input such as the fill and spill charge injection method disclosed in a Kohyama publication. This is because each input charge packet must be sufficient in quantity to fill the entire input portion of each of the parallel channels before a portion of the charge packet is fed into a particular one of the parallel channels. The remainder of the charge falls back into the fill and spill input structure. As a result, it is not desirable to use the device disclosed in the Kohyama publication to store charge packets representing analog information. Instead, the device of the Kohyama publication is intended for storage of digital information only.
In summary, the density of the parallel storage array in a series-parallel-series memory has been constrained by the spacing of the storage cells in the serial CCD input register, because the same serial register cell always transfers charge into the same parallel channel. Parallel storage arrays in which this disadvantage was removed, as in the Kohyama device, are not useful with a serial input CCD register, and furthermore are not preferably used to store charge packets representing analog information.